Initial Commit with everything done

2021-04-13 00:07:23 +03:00
commit 20cf599d89
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+// This file is part of www.nand2tetris.org
+// and the book "The Elements of Computing Systems"
+// by Nisan and Schocken, MIT Press.
+// File name: projects/03/a/PC.hdl
+
+/**
+ * A 16-bit counter with load and reset control bits.
+ * if      (reset[t] == 1) out[t+1] = 0
+ * else if (load[t] == 1)  out[t+1] = in[t]
+ * else if (inc[t] == 1)   out[t+1] = out[t] + 1  (integer addition)
+ * else                    out[t+1] = out[t]
+ */
+
+CHIP PC {
+    IN in[16],load,inc,reset;
+    OUT out[16];
+
+    PARTS:
+    
+    // Put your code here:
+    Or(a=reset,b=load,out=load1);
+    Or(a=load1,b=inc,out=trueLoad);
+    Inc16(in=b,out=incIn);
+    And16(a=incIn,b[0]=inc,b[1]=inc,b[2]=inc,b[3]=inc,b[4]=inc,b[5]=inc,b[6]=inc,b[7]=inc,b[8]=inc,b[9]=inc,b[10]=inc,b[11]=inc,b[12]=inc,b[13]=inc,b[14]=inc,b[15]=inc,out=in1);
+    Not(in=reset,out=negReset);
+    And16(a=in,b[0]=negReset,b[1]=negReset,b[2]=negReset,b[3]=negReset,b[4]=negReset,b[5]=negReset,b[6]=negReset,b[7]=negReset,b[8]=negReset,b[9]=negReset,b[10]=negReset,b[11]=negReset,b[12]=negReset,b[13]=negReset,b[14]=negReset,b[15]=negReset,out=in2);
+    Not(in=load,out=negLoad);
+    And(a=negReset,b=negLoad,out=out1);
+    And(a=inc,b=out1,out=sel);
+    Mux16(a=in2,b=in1,sel=sel,out=trueIn);
+    Register(in=trueIn,load=trueLoad,out=out,out=b);
+}